As dynamic random access memories (DRAM) have become more highly integrated, there have been efforts to maintain desired storage capacitances for memory cell capacitors. In particular, there have been efforts to increase the surface areas of capacitor electrodes and to develop capacitor dielectric layers having relatively high dielectric constants. For example, electrode surface areas have been increased by forming hemispherical grains thereon. In addition, thin nitride films have been formed on storage node electrodes and then a plurality of micro pinholes have been formed in the thin nitride layer using a wet oxidation.
When using a polysilicon electrode with hemispherical grains formed thereon, it may be difficult to dope the undoped polysilicon layer with dopant ions. Furthermore, it may be difficult to maintain a desired hemispherical grain shape as a result of a suppression of silicon migration. In addition, the hemispherical structure may be damaged during ion implantation and/or POCl.sub.3 deposition.